Test program creation, training and seminars are just some of the many tasks our support team handle with on a daily basis. The GÖPEL electronic service team can support many other tasks for example with BSDL verification, calibration of certain hardware modules, and many other questions regarding "Test & Programming via JTAG & Boundary Scan".

Together we will find an efficient solution that suits you and your application.

The following services are available:

  • Model creation for non-boundary-scan capable ISs

    SYSTEM CASCON does not generate test steps for assembly areas containing unknown components. In general, components are handled as library models, whereby the model creation based on the data sheet is carried out by the user himself or by us as a service.

    By the way: This service is free of charge for customers with an active maintenance contract.

    We create models for you - for all your ICs. 

    ► Place your request here

  • BSDL Verification

    The IEEE1149.1 standard defines so-called BSDL Files, which are provided by the JTAG/Boundary Scan IC manufacturers. BSDL (Boundary Scan Description Language) files describe the test resources implemented in the IC and are used in all boundary-scan tools.

    In some cases the BSDL files are no longer available. In this case it is not possible to create a test program. Although most BSDL files are delivered correctly nowadays, there is still a residual risk of errors. In this case, the execution of tests can lead to incorrect error messages or damage to the assembly.

    We create or check your BSDL files.

    ► Place your request here

  • Test coverage analysis

    Contact us for a free board analysis!

    We sign a non-disclosure agreement - you send us schematic and CAD data! The data will be reviewed, an analysis will be performed and you will receive the documented results!

    With the test coverage analysis we help you to evaluate the test depth of your boards by Embedded System Access (Boundary Scan, Processor Emulation Test, FPGA Embedded Test etc.). You get a quick overview of testable circuit areas and can therefore better calculate the test coverage.

    You will also receive a DFT check (Design for Testability) from us.
     - Slide chain - general conditions - design recommendations

    Your advantages from our analysis

    • saving of test points in the PCB design#
    • reduced needles in ICT
    • reduced test time at the flying probe test
    • simplified functional test

    The following data is required for a Boundary Scan test coverage analysis:

    • Circuit diagram as searchable PDF
    • CAD netlist and/or layout data

    typical formats are:

    • ODB++ (.gz, *.tgz)
    • Altium Designer (.pcb, .net) in ASCII 2.8 format
    • Zuken Redac (.pcf)

    Your format is not included?

    We will be happy to create a new import filter. We need the following information:

    A netlist (it can also be 2 files) in ASCII format with the following information:

    • Device name and type (e.g. U1 - STM32F1)
    • net information (net name and pins of the contained components)
    ► Order analysis now

    Overview of used formats:
    → Net list format
    → Layout formats

  • Workshop with your application

    Sometimes the more efficient way is to support an application together with a test system specialist. For this purpose we offer you the opportunity with workshops, which , in addition to theoretical content (e.g. training on special topics), also address practical tasks on the projects and assemblies.

    ► Place your request here

  • Test of prototype assemblies up to small series

    You have a small batch size of assemblies or even just individual prototypes - but still no experience with Boundary Scan, not to speak of Embedded JTAG Solutions? Or you do not want to deal with test technologies in detail?

    We will take on the job, from analysis to testing and programming. All from one source!

    ► Place your request here

  • Programming of prototype assemblies up to small series

    The prototypes are finally finished, but now you can't go on because the firmware hasn't been loaded into the memory?

    We program your assemblies;  and we deliver the corresponding project at the same time.

    ► Place your request here

  • Test programme performance - reduction of test/programming time

    Your test programs run too slowly and you suspect that it could be the settings? Or you want to get the last reserves of speed out of your application?

    Let us take a look at your test programme!

    ► Place your request here

  • Calibration service for your hardware modules from GÖPEL electronic (with CION LX ICs)

    The Embedded JTAG Solutions are mostly digital test procedures. Analogue measurements can still be performed; with our hardware modules with the CION LX device.

    Those modules can be calibrated at our premises or at your site.

    ► Place your request here

  • X-ray services

    If you would like to have more detailed information about the soldered connections and soldering quality of your assembly, our specialists in the field of automatic X-ray inspection will be happy to support you in the analysis and troubleshooting using 2D, 2.5D and 3D X-rays.

    ► Request X-ray services here



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