Interface tester for most modern bus interfaces
Test extension for laboratory and production
The SCANFLEX II Interface Tester Master (SFX II ITM) represents a new generation of interface testers within the Embedded JTAG Solutions hardware platform SCANFLEX II. The new expansion module is particularly aimed at testing interfaces in the laboratory and in production.
The solution is based on a multi-core architecture in combination of processor and FPGA, which allows a significant improvement of the test depth in the area of state-of-the-art bus interfaces. The Interface Test Master has 8 independent and freely configurable ITMC slots for inserting ITM cards (ITMC). This openness makes it possible to systematically test the corresponding functions of a wide variety of interfaces - from simple variants such as RS232, I2C and SPI to more complex interfaces such as USB, LAN and media connections. Simultaneous interface testing on several test items is also supported. This solution sets new standards in terms of modularity, flexibility and performance.
The SFX II ITM/8 is controlled primarily via a LAN connection to the SFX II controller, but with limited functionality it can also be controlled via a UART interface (RS232) or an IEEE1149.1 TAP connection. The Interface Test Master can also be operated stand-alone. For this purpose it offers an integrated Web Service based on the Web Service Description Language (WSDL).
Due to the flexible control and the universal slot technology, the SFX II ITM/8 can be perfectly adapted to the concrete test scenario of the user. It is also possible to use several ITMs at the same time. The performance of the multi-core system enables parallel interface tests of up to eight interfaces or test items.
The architecture of the SFX II ITM is optimized for direct installation in fixtures and simple signal supply and wiring. This also optimizes the connection to the test object.
As part of the SCANFLEX II architecture, the ITM offers the option of seamlessly combining interface tests with other procedures such as JTAG/Boundary Scan, Processor Emulation Test, FPGA Assisted Test or Flash Programming on a single platform, thereby significantly increasing test depth and process effectiveness.