GOEPEL electronic is extending the VarioTAP technology for universal processor emulation to the R-Car M3 SoCs (System-on-Chip) by Renesas. This will enable the processor via the native debug port to be converted into a design-integrated test and programming tool. The VarioTAP model includes all the relevant access details for the respective target processor and forms part of a comprehensive IP library (Intellectual Property). As a result, users can use the processor as a native tool for hardware design validation of prototypes, for production testing and for programming Flash modules.
The Renesas R-Car M3 SoCs are equipped with ARM cores. The peripheries can be addressed via JTAG interface. Controlling of GPIOs and external RAM tests are possible as well. R-Car M3 SoCs are delivered in 1255-pin SiP (System-in-Chip) or 1022-pin Flip Chip BGA packages and can be adapted via the JTAG interface.
On this way, both Boundary Scan and VarioTAP can be executed. An external TIC020 / 022 module is required to control additional time-sensitive signals such as a HW reset via the VarioTAP model. The aim of VarioTAP is, for example, to make embedded tools in the design available - after installation of the microcontroller - for testing, for hardware debugging, for Flash programming and for design validation.
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