Debugging and testing the Zynq UltraScale+ Multi-processor SoCs by Xilinx

Extension of the ChipVORX model libraries

GOEPEL electronic is extending the availability of specialist model libraries to include the multi-processor SoCs (MPSoC) from the UltraScale+ range by Xilinx® to support embedded JTAG solutions.

The in-system technology ChipVORX configures and controls testing and debugging functions using the resources inherent in the module. The special ChipVORX model libraries are modular IPs (Intellectual Properties), which contain all the relevant access details for the respective target processor and form part of a comprehensive IP library. During the project development phase, users can first select the target processor and then activate the desired test functions. These include a DDR4 RAM Access Test and universal frequency measurement, as well as the Bit Error Include Rate Test (BERT).

Design-integrated test electronics eliminate the need for contact with the MPSoC via needles or probes. In addition, it is also easily possible to have a combination with other non-intrusive methods such as Boundary Scan or processor emulation on a single platform.

The multi-processor architecture of the Zynq UltraScale+ achieves significantly higher performance with minimal energy requirements. With three different versions, the MPSoCs are aimed in particular at challenging applications such as 5G wireless, Advanced Driver Assistance Systems (ADAS) and the industrial IoT (Internet of Things).

ZYNQ UltraScale+

ZYNQ UltraScale+

Created by Matthias Müller | | Embedded JTAG Solutions Software ChipVORX 嵌入式JTAG解决方案

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