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Webinar: Getting started with Embedded JTAG Solutions

The modern alternative to struggling and costly traditional test methods

Learn about getting started with Embedded JTAG Solutions (EJS), including design-for-test (DFT) requirements and ease-of-use provided by pre-existing models and Automatic Test Pattern Generation (ATPG), simplifying test development and reducing cost compared to traditional methods while enabling a wide range of high performance alternatives.

With rapidly evolving PCBA and SMT technologies, most test engineers responsible for PCBA test in today's electronics manufacturing industry face major challenges that even the most sophisticated and expensive traditional test methods such as ICT and Flying Probe cannot effectively address.

These challenges include diminishing access to components due to increasing densities, covered contacts and lack of test points, as well as the need to test high frequency aspects of board designs sensitive to physical contact. Faced with the ever-increasing cost associated with test equipment, fixtures, and engineering effort required for traditional test methods to keep pace with advancing PCBA technology, it is easy to see that a better way is needed.

Embedded JTAG Solutions (EJS) offer an alternative that is relatively inexpensive and easy to learn, while providing high performance options that are beyond even the most expensive and engineering intensive traditional test methods. Utilization of EJS can provide component access to not only verify physical PCBA integrity but also to leverage on-board resources for high performance embedded test operations.

EJS can reduce the dependency on high cost external test equipment and fixtures while taking advantage of ATPG technology to reduce the test program development effort required to attain acceptable test coverage. With EJS, on-board processors and FPGAs can be accessed, controlled and used to perform test operations on circuit elements they are connected to, including high speed in-system programming of Flash, at-speed test of dynamic memory, at-speed test of high-speed interfaces, and even mixed-signal test functions.

What you will learn

  • Well-defined DFT requirements to guide testability of the design.
  • Reducing the engineering resources required for test program development.
  • Relatively low cost and easy to learn.
  • Addresses ever increasing challenges related to component access by testing PCBA assembly integrity from the inside out.
  • Enables utilization of technology already on the PCBA for high performance functional/mixed signal test and in-system programming.
  • Reduces dependency on high-cost test equipment and fixtures.

 

Time
3 PM BST (2 PM UTC)

Date
17 May 2018

Speaker
Lester Tseng, GOEPEL electronics Ltd.

 

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Facts
17 May 18 14:00 15:00
Organizer
Frank Amm
Frank Amm
+49-3641-6896-741 Phone
+49-3641-6894-945 Fax