Professional Level with Boundary Scan plus

Even faster testing and dynamic fault diagnosis

At the Professional level, the user achieves higher access speeds (At-Speed or Nominal-Speed). Although the test speed is still below the actual board function in most applications , it is significantly faster than with the conventional boundary scan test (no static signal change)

Basically, the test speed is now defined by the debug access. For example, a RAM connection test with "Boundary Scan plus" can also detect and diagnose dynamic problems at termination resistors.

Significantly higher speeds can also be reached during programming using  VarioTAP or ChipVORX (in the range of kBytes/s tp MBytes/s).

Test and programming at the Professional Level are controlled via JTAG interface or a debug interface, e.g. via SWD (ARM), DAP (Infineon) and others.

The Embedded Board Test at Professional Level

Structural test through combination of boundary scan and IP operations

Applications:

  • interactive Test between Boundary Scan pins and µProcessor GPIOs
  • detection of shorts between Boundary Scan and µProcessor GPIO nets
  • detection of open pins (Boundary Scan and µProcessor GPIO)
  • missing or wrong Pull resistors at µProcessor GPIO

The Embedded Functional Test at Professional Level

Functional test through combination of boundary scan and IP operations

Applications:

  • dynamic RAM connection test with FPGA or µ-processor
  • dynamic access to non-boundary scan elements
  • Level Shifter, Driver ICs, analog switch
  • logic components
  • memory, RTC, sensors, PHY …
  • functional interface tests
  • GPIO, I2C, SPI, UART, USBx, LAN, CAN, PCIe ...

Embedded Programming at Professional Level

IP controlled programming of flash memories and μControllers

Applications:

  • programming in MB data range
  • (C)PLD/FPGA configuration with embedded instrument
  • FPGA (Boot-)EEPROM / Flash programming
  • µProcessor OnChip Flash programming
  • µProcessor Flash programming
  • I2C, SPI, Microwire, NOR, NAND, PCM, eMMC ...

Test Speed

The test speed is always related to a pin or a pin group and depends on the intended use in the future application.

Static

The signal change runs far below the functional speed of the controlling pin(s). Usually, these are boundary scan or GPIO-controlled accesses that run slowly due to the serial shifting processes via the JTAG interface (e.g. the flashing of an LED with confirmation by the operator).

At-Speed

Signal changes run below the functional speed of the controlling pin(s), e.g. when accelerating the RAM connection test or accelerated flash programming.

Nominal-Speed

Signal changes are similar to the functional speed of the controlling pin(s), e.g. in boot flash programming with an embedded FPGA instrument.

Programming Speed

The programming speed depends on the amount of data to be transmitted and is dependent on several factors. Without knowledge of the application, precise statements are therefore usually not possible. Information on speed is always subjective and depends on the application.

Medium to high programming speed

In the Professional level with Boundary Scan plus, higher programming speeds in the range of kBytes/s to MBytes/s are achieved.

Applications from GÖPEL electronic

The Professional level is applied with the following combinable technologies

  • JTAG-based Test

    The standardised Boundary Scan method according to IEEE 1149.1  can simply control complex components such as FPGAs, processors, controller and CPLDs. Detailed hardware knowledge is not required.

    » Learn more about Boundary Scan

  • FPGA-based Test

    The ChipVORX technology uses the FPGA logic for the test. With the help of universal FPGA models, you can access standard functions without further adjustments. This allows classic boundary scan tests and programming to be significantly accelerated. Non typical tests such as frequency measurement can also be realised.

    » Learn more about ChipVORX

  • µProcessor-based Test

    A processor-specific model brings the IC into debug mode. After that, internal functions (registers, memory areas, complex controllers) are addressed to perform analogue measurements, at-speed Flash programming or even at-speed RAM tests. Both the JTAG port and other debug interfaces can be used for this purpose.

    » Learn more about VarioTAP

The basis of all testing and programming is the hardware architecture SCANFLEX II to control the UUT . 

» Learn more about SCANFLEX II

The cost-efficient controller SCANBOOSTER II is especially recommended for entry-level users. It is best suited for standard applications with lower performance requirements.

» Learn more about the SCANBOOSTER II