The test speed is always related to a pin or a pin group and depends on the intended use in the future application.
The signal change runs far below the functional speed of the controlling pin(s). Usually, these are boundary scan or GPIO-controlled accesses that run slowly due to the serial shifting processes via the JTAG interface (e.g. the flashing of an LED with confirmation by the operator).
Signal changes run below the functional speed of the controlling pin(s), e.g. when accelerating the RAM connection test or accelerated flash programming.