Each Boundary Scan capable device has its own special Boundary Scan structure. The knowledge about this structure is essential for a test engineer or a test software to work with the device effectively. Although the IEEE1149.1 standard prescribes some mandatory requirements, it also leaves enough room for individuality. And this is necessary, as can be seen from the example of the structure/number of Boundary Scan cells: A device with 20 pins has a smaller number of cells compared to a device with 1,500 pins.
The Boundary Scan Description Language (BSDL) was developed to describe this individuality. It is the communication medium between the chip manufacturer (who can only know the "inner workings" of his chip) and the test engineer (who wants to use this "inner workings" in his special application). It is a single file.
The BSDL file provides information about, among other things:
- available test bus signals
- particularly information on the presence of the optional /TRST signal
- max. TCK frequency up to which the device can be operated
- possible "Compliance" pins
- the command register
- available commands incl. their bit code
- length of the command register
- the data registers
- available data registers incl. possible preset values, e.g. IDCODE of the device
- the structure of the Boundary Scan cells
- mapping to component pin