Contact
Main features of our hardware concept
- fully parallel TAP architecture
- leading performance through hardware acceleration
- software-defined TAP protocols
- signal interfaces adapted to production demands
- support of substantial distances to the unit under test
- maximum fault coverage due to supplementary reserves
- optimal integration capability into another ATE
- maximum modularity and scalability
- in-field hardware updates
- support of all important bus platforms
- a portfolio consisting of more than 450 hardware components
×
Do you need help?