Low cost package for JTAG/Boundary Scan beginners

The SCANBOOSTER/USB Designer Studio is targeted for design, production and services personnel looking for a fast turnaround in terms of application development. The system comes packaged with hardware and software tools that can be used right out of the box.

SCANBOOSTER/USB Designer Studio's feature set targets various application levels like:

• Infrastructure and Interconnect Testing
• Internal Device Test (INTEST/BIST)
• Edge Connector Testing
• Generation of manual tests
• Hardware Verification

Interactive PIN Toggler enables:

• Control your circuit using the JTAG/Boundary Scan chain
• Automatic control through non Boundary Scan parts (Buffers, logic, etc)
• No firmware or software has to be loaded
• Quickly control the signals you want and measure the results
• Automatically cross reference between layout and schematic
• Record, edit and play back steps to quickly create custom tests

CASCON GALAXY® software is a completely integrated solution with comprehensive model library and Automated Test Program Generation (ATPG) tools. It also includes:

• Over 80 CAD readers
• Net and Pin level diagnostics
• Graphical hardware debugging
• Vector browsing and register watching
• Single/batch executors
• Integration with In-circuit, MDA & Flying Probers

Numerous options and full compatibility allows for upgrading the SCANBOOSTER/USB Designer Studio as your needs change. All work can be reused at all stages of the product lifestyle. Some options are:

• Cluster/Device Testing
• Memory Test (SRAM, DRAM, NAND, NOR, ...)
• PLD/FPGA Testing
• Internal Flash Programming
• External Flash Programming

Scan Vision III with options:

• Virtual Schematic Visualizer  
• True Schematic Visualizer
• Layout Visualizer
• Interactive PIN Toggler

TAP extension option:

• Second TAP for SCANBOOSTER
• Upgrade to SCANFLEX® platform

• Software configurable TAP ports
• Programmable TCK up to 16 MHz
• 32 dynamic programmable I/O
• 2 Analogue (10 bit) I/O
• 6 general purpose I/O and trigger lines
• Automatic Test Program Generation (ATPG)
• Pin failure detection support
• Advanced Vector browser
• Multi Mode Debugger
• Built-in algorithmic JTAG/Boundary Scan language