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Automated Optical Inspection (AOI/AXI)
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Combination AOI/BScan

Automated Inspection (AOI/AXI) with JTAG/Boundary Scan

Combination of Boundary Scan and Automated Optical Inspection
Combination of Boundary Scan with Automated Optical Inspection

Obviously, the Automated Optical Inspection has its limitations. On the one hand, one cannot look „under” a components (e.g. BGA), on the other hand it is impossible to check the electrical characteristics of an IC.

The solution in regards with a much higher fault coverage is a combination of AOI with Boundary Scan.

Boundary Scan not only closes the gap an AOI system leaves in regards to functional accuracy, but enables the testing of components that are not optically testable. Since Boundary Scan only needs a single port test bus for testing a PCB, this technology can easily and reliably be integrated into an AOI system.

The combination Boundary Scan/AOI optionally provides a fault coverage close to 100% at minimal cost.


  • Very high fault coverage
  • Greater test depth by providing access to hidden and complex components by means of Boundary Scan test (JTAG)
  • High flexibility, because no UUT specific adapter is required
  • Parallel execution of both test techniques
  • Simple integration of BScan in an AOI system
  • One-stop availability because GÖPEL electronic is a vendor of both test technologies
  • Execution of, e.g. FLASH programming, during the optical inspection phase

Basic concept of combination Boundary Scan & AOI

Basic concept of combination Boundary Scan & AOI

For the combination of an AOI System with Boundary Scan (JTAG) a Boundary Scan controller is integrated in the system’s base PC. A controllable power supply unit provides power to the PCB. Connection to the PCB can be via plug/socket connectors or flexible nail adapters.

Extended Boundary Scan test

Extended Boundary Scan test

Increased fault coverage can be achieved by contacting not testable pins with a virtual Boundary Scan cell. To simplify this, on the AOI system’s camera there is a test probe which enables access to the peripheral ports or internal nets on the PCB.

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