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Security and Protection for Xilinx Ultrascale FPGAs

New AES Programmer for protection against theft of intellectual property

With a new AES Programmer, GOEPEL electronic protects the Xilinx Ultrascale FPGAs against potential attackers and IP theft (Intellectual Property). The Advanced Encryption Standard (AES) Programmer is a tool that is integrated into the Embedded JTAG Solutions software SYSTEM CASCON for protection of the circuit design.

AES is an official standard supported by the National Institute of Standards and Technology and the US Department of Commerce. Without the corresponding keys, bit streams cannot be analyzed, which means that the encrypted designs are protected against re-engineering, cloning and copying.

Core element is special chip logic for the AES/Galois Counter Mode (GCM). The AES/GCM-based decoding and authentication of the bit streams provides a very high security level and is based on symmetric encryption with 256bit AES keys. In addition, the Ultrascale FPGA also supports RSA authentication, which is based on asymmetric algorithms and requires an RSA key stored in the FPGA. The Xilinx Ultrascale Programmer supports all the mechanisms and enables the secure and reliable handling of the required keys, as well as the coded design data, according to the specific definitions of the manufacturer. These features are essential since the activation of the AES mechanism is irreversible and the FPGA then only accepts correspondingly encoded bit streams as mission designs.

Because the Xilinx Ultrascale AES Programmer is part of the SYSTEM CASCON ISP Tool Suite, the AES configuration can easily be combined with other procedures such as Boundary Scan or Processor Emulation Tests. This means that only one platform is required in the production test, which also supports the download of the encrypted programming data.

created by Matthias Müller | |   Embedded JTAG Solutions
Embedded JTAG Solutions Software Suite SYSTEM CASCON
Embedded JTAG Solutions Software Suite SYSTEM CASCON