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Home > JTAG/Boundary Scan > Hardware > SCANFLEX > Controller > USB/LAN
SCANFLEX® Controller für USB2.0/LAN
| | General product information - Compliant with USB2.0 and Fast Ethernet (100Mb/s) with automatic port recognition
- Hot Insertion, Plug and Play, as well as DHCP
- Compliant with IEEE1149.1, IEEE1149.4, IEEE1149.6, IEEE1532, JESD71 (STAPL), SVF (Serial Vector Format)
- Can be combined with all available SCANFLEX® components (SCANFLEX® TAP Transceivers, SCANFLEX® I/O Modules)
- Full software support by JTAG/Boundary Scan development environment SYSTEM CASCON™
- Guaranteed support of future advancements due to highly flexible, in-field re-programmable system hardware
- Embedded operating system based on integrated 32 bit RISC processor allows perspective functional extensions
- Leading system architecture, based on specifically developed technologies (SPACE™, ADYCS™, HYSCAN™, FASTSCALE™)
- Test programs and ISP scripts are cross compatible with all Boundary Scan controllers from GÖPEL electronic
- Applicable for standard Boundary Scan test, in-system programming (ISP) and in-system configuration (ISC)
- Supports Extended Boundary Scan operations in combination with various other test and programming methodologies
- Fast and simple integration in Third Party ATE (Flying Prober, ICT, MDA, functional testers, …) as Boundary Scan option
- Portable, universal solutions for laboratory, production and service
- Compact unit in metal housing, shipping with appropriate power supply as well as LAN and USB cables
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SFX/USL1149-A JTAG/Boundary Scan Controller for medium performance
| Product features - ADYCS™ (Active Delay Compensation)
- HYSCAN™ (Hybrid Scan)
- FASTSCALE™ (Fast Performance Scaling)
- Scan Data Buffer (TDI/TDO Cache)
- Supports 8 parallel, independent TAP
- TCK frequency range DC - 20 MHz
- TCK step width 250 Hz
| Target applications on board and system level - In-System-Configuration of PLD/FPGA
- In-system programming of Flash < 1Mbit
- On-chip Flash programming < 1Mbit
- Test of units up to medium complexity
- Control of complex self tests (BIST)
- Static mixed signal test / verifications
- Gang Programmierung / gang test
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SFX/USL1149-B – JTAG/Boundary Scan Controller for high performance
| Product features - ADYCS™ (Active Delay Compensation)
- HYSCAN™ (Hybrid Scan)
- FASTSCALE™ (Fast Performance Scaling)
- SPACE™ II scan architecture
- Supports 8 parallel, independent TAP
- TCK frequency range DC - 50 MHz
- TCK step width 250 Hz / 1MHz
| Target applications on board and system level - In-System-Configuration of PLD/FPGA
- High speed ISP of Flash
- On-chip Flash programming < 1Mbit
- Test of units up to medium complexity
- Control of complex self tests (BIST)
- Static mixed signal test / verifications
- Gang Programmierung / gang test
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SFX/USL1149-C JTAG/Boundary Scan Controller for ultra high performance
| Product features - ADYCS™ (Active Delay Compensation)
- HYSCAN™ (Hybrid Scan)
- FASTSCALE™ (Fast Performance Scaling)
- SPACE™ II scan architecture
- Supports 8 parallel, independent TAP
- TCK frequency range DC - 80 MHz
- TCK step width 250 Hz / 1MHz
| Target applications on board and system level - On-chip Flash programming > 1Mbit
- System-in-package (SIP) test
- Control of complex self tests (BIST)
- Static mixed signal tests
- Dynamic functional verifications
- Test of dies
- Gang Programmierung / gang test
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