SCANFLEX^® Controller for PXI Express Bus

General product information

• Compliant with PXI Express standard specification Revision 1.0, incl. PXI Express Trigger Bus and Local Bus support
• Integrated x1 Interface with 264MB/s data throughput in zero wait state burst mode
• Compliant with IEEE1149.1, IEEE1149.4, IEEE1149.6, IEEE1532, JESD71 (STAPL), SVF (Serial Vector Format)
• Can be combined with all available SCANFLEX^® components (SCANFLEX^® TAP Transceivers, SCANFLEX^® I/O Modules)
• Full software support by JTAG/Boundary Scan development environment SYSTEM CASCON™
• Guaranteed support of future advancements due to highly flexible, in-field re-programmable system hardware
• Leading system architecture, based on specifically developed technologies (SPACE™, ADYCS™, HYSCAN™, FASTSCALE™)
• Test programs and ISP scripts are cross compatible with all Boundary Scan controllers from GÖPEL electronic
• Applicable for standard Boundary Scan test, in-system programming (ISP) and in-system configuration (ISC)
• Supports Extended Boundary Scan operations in combination with various other test and programming methodologies
• Simple integration in PXI Express systems based on preconfigured plug-ins (NI LabView, NI LabWindows, and NI TestStand)
• Universal solutions for laboratory and production

 SFX/PXIe1149-A – JTAG/Boundary Scan Controller for medium performance

Product features

• ADYCS™ II (Active Delay Compensation)
• HYSCAN™ (Hybrid Scan)
• FASTSCALE™ (Fast Performance Scaling)
• Scan Data Buffer (TDI/TDO Cache)
• Supports 8 parallel, independent TAP
• TCK frequency range DC - 20 MHz
• TCK step width 250Hz

Target applications on board and system level

• In-system configuration of PLD/FPGA
• In-system programming of Flash < 1Mbit
• On-chip Flash programming < 1Mbit
• Test of units up to medium complexity
• Control of complex self tests (BIST)
• Static mixed signal test / verifications
• Gang programming / gang test

 SFX/PXIe1149-B – JTAG/Boundary Scan Controller for high performance

Product features

• ADYCS™ II (Active Delay Compensation)
• HYSCAN™ (Hybrid Scan)
• FASTSCALE™ (Fast Performance Scaling)
• SPACE™ II scan architecture
• Supports 8 parallel, independent TAP
• TCK frequency range DC - 50 MHz
• TCK step width 250Hz / 1MHz

Target applications on board and system level

• In-system configuration of PLD/FPGA
• In-system programming of Flash
• On-chip Flash programming > 1Mbit
• Test of units with highest complexity
• Control of complex self tests (BIST)
• Static mixed signal test / verifications
• Gang programming / gang test

 SFX/PXIe1149-C – JTAG/Boundary Scan Controller for ultra high performance

Product features

• ADYCS™ (Active Delay Compensation)
• HYSCAN™ (Hybrid Scan)
• FASTSCALE™ (Fast Performance Scaling)
• SPACE™ II scan architecture
• Supports 8 parallel, independent TAP
• TCK frequency range DC - 80 MHz
• TCK step width 250 Hz / 1MHz

Target applications on board and system level

• On-chip Flash programming > 1Mbit
• System-in-package (SIP) test
• Control of complex self tests (BIST)
• Static mixed signal tests
• Dynamic functional verifications
• Test of dies
• Gang Programmierung / gang test