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Home > JTAG/Boundary Scan > Hardware
JTAG/Boundary Scan Hardware ToolsA Boundary Scan Controller provides the hardware interface between tester and Unit Under Test (UUT). GÖPEL electronic offers the widest product range for test and ISP applications throughout the UUT's product life cycle. The choice of Controller depends on particular application requirements. Test programs created with SYSTEM CASCON software (CASCON GALAXY®, CASCON POLARIS™) are cross compatible with all GÖPEL Boundary Scan Controllers. With SCANFLEX® GÖPEL has developed a hardware architecture that is unique and unmatched in modularity, flexibility, and feature set. [Here] you can find details about SCANFLEX®. The Scan Booster™ Controller family offers a low price alternative for applications where the advanced features of SCANFLEX® are not required, while still offering multiple TAPs as well as 32 PIP signals. Details about the Scan Booster™ Controllers can be found [here].
Boundary Scan Controller overview SCANFLEX® Boundary Scan Controllers from GÖPEL electronic are available in three performance classes (A, B, and C). A main difference between these classes is the implemented Boundary Scan vector memory architecture. B- and C-type controllers feature the patented [SPACE™ Architecture] for advanced vector handling. This [table] provides an overview about the various Boundary Scan Controller parameters. The [HYSCAN™] feature, available with all SCANFLEX® Controllers, provides a means to synchronize serial JTAG/Boundary Scan vectors and parallel I/O vectors. All of GÖPEL electronic's Boundary Scan Controllers are fully supported in the software suites [CASCON GALAXY®] and [CASCON POLARIS™]. Hardware drivers are integrated in the CASCON software and are activated automatically based on the selected Controller.The following table provides suggestions for the choice of controller for various specific applications:
Note: C-type SCANFLEX® Controllers are only partially fitting for board-level applications. These controllers provide a performance that typically cannot be taken advantage of because of UUT design and limitations in JTAG/Boundary Scan ICs on the UUT. [Here] you can find further guidance for the selection of a Boundary Scan controller. JTAG/Boundary Scan is data intensive, with some test and programming applications requiring the handling of several Gigabit of data. GÖPEL electronic's patented SPACE™ architecture enables continuous bursts of variable length. In contrast to traditional solutions, which implement linear buffers or fixed data compression, SPACE™ is comparable to a serial micro sequencer. This architecture allows the simultaneous generation of complete vector sets for multiple, independent TAPs without any host access. Extended JTAG/Boundary Scan Test applications involving external Boundary Scan based test channels connected to peripheral UUT interfaces induce problematic side effects in that these external Boundary Scan resources become part of the UUT's Boundary Scan chain. Consequently, the number of Boundary Scan devices - and with it Boundary Scan cells and Boundary Scan nets – involved in a test change.HYSCAN™ has been designed to eliminate this problem. The test channels connected to the UUT can consist of various components, such as SCANFLEX® or PXI I/O modules, or even nails of an In-Circuit Tester. HYSCAN™ keeps the test program development and execution independent from the actual test channel hardware. As a result, the test pattern and ISP routines become portable between various tester setups and the test coverage analysis for the UUT is not falsified by tester Boundary Scan resources connected to UUT peripheral interfaces.
Click [here] to view a list of important criterions for the selection of your JTAG/Boundary Scan Hardware.
Please test our interactive learning software for IEEE 1149.x, the Boundary Scan Coach which guides you to the basics and application of Boundary Scan/JTAG [Boundary Scan Coach]
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