The Software concept
The quality of a JTAG/Boundary Scan system is significantly determined by the performance and architecture of the used software.
In 1991 GOEPEL electronic has been developing an integrated Boundary Scan software development environment named SYSTEM CASCON.
Since then the uniqueness of the Boundary Scan workbench has been continuously expanded through the integration of new intelligent tools, along with innovative system extensions and improvements of the user interface.
Software updates are available via our customer web site GENESIS.
To perfectly address the needs of development, production and customer service, the software packages are available in dedicated performance classes as Development Stations (DS) and Test/Execution Stations (TS/ES). In-system-programming (ISP) tasks can be executed with CASCON POLARIS editions. The CASCON GALAXY version supports ISP and test methods.
The right tools for your application
VarioTAP by GOEPEL electronic is a technology for the fusion of Boundary Scan and Processor Emulation Test. This comprehensive suite bridges the gap towards achieving higher testing dynamics and also enables synchronisation with external I/O channels.
|Memory cluster||real time|
|Peripheral interface||real time|
|Code runner||real time|
Chip-embedded instruments can prevent the problems with access points prevalent in traditional external instruments, while SYSTEM CASCON – by virtue of ChipVORX® technology and open software interfaces – is able to simultaneously access and control both classes. This ability greatly improves the capacity and test coverage of the entire system.
|Type of instrumentation||Controllable instruments|
|Chip-embedded Instruments||Softcore IP (FPGA based)
|External ATE instruments||Software instruments,
|*VarioCore is a proprietary technology for the reconfi guration of I/O modules|
Tool Suite for Functional I/O Test
In addition to structural tests, SYSTEM CASCON also offers tools for functional testing. Here, too, CASLAN multipurpose control language is a key feature. To generate tests, one can either import simulation vectors in IEEE 1445 format, or resort to behavior models in the CASCON library. Selected PXI or SCANFLEX modules by GOEPEL electronic, which can generate the vectors dynamically, can be used as external I/O drivers.
|I/O level||ATPG||PFD||Caslan||IEEE 1445||I/O driver||Speed|
|Board I/O||External I/O||at-speed|
|Cluster I/O||Boundary Scan||real time|
|Device I/O||Boundary Scan||at-speed|
This comprehensive suite contains powerful ATPG tools (automatic test program generation) that generate de-buggable CASLAN source code and can also integrate external I/O channels. The PFD modules (pin failure diagnostics) ensure clear error messages.
|BST process||ATPG||PFD||Caslan||AGB*||Ext. I/O|
|Logic cluster (truth table)|
|Logic cluster (waveforms)|
|Virtual Scan Pin probe|
|* AGB: Anti Ground Bounce Feature|
Regardless of whether complex fl ashes or PLDs are being used, this suite always offers the ideal tool for automated, fast and secure programming, for each application.
|Programming tool||MCU||PLD||serial flash||paralell flash|
|IEEE 1149.1/Boundary Scan|
|External PIO channels|
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Tool Suite for Debugger/Visualizer
This suite enables graphical analysis and validation of designs and project data during full cross-probing.
|Tool domain||Tool suite|
|Hardware debugger||Pin Toggler
Interactive CASLAN Execution
|Software debugger||Interpretive CASLAN Executio Watch
ATPG: Automatic Test Program Generation
PFD: Pin Failure Diagnostics